1. Field of the Invention
The present invention relates to a test probe, and more particularly to a test probe for contacting an electronic device and its method of manufacture.
2. Description of the Related Art
In the field of electronic systems, there is a continuous need to increase performance and reduce size. This is largely achieved by improving semiconductor wafer manufacturing and semiconductor packaging technologies. Wafer manufacturing involves simultaneously fabricating numerous semiconductor chips as a batch on a silicon wafer using various etching, doping and depositing steps. After the wafer is complete, the chips are separated from one another and packaged.
Wafer manufacturing strives to reduce transistor or capacitor feature size in order to increase circuit density and enhance functionality. Device geometries with sub-micron line widths are so common that individual chips routinely contain millions of electronic devices. Reduced feature size has been quite successful in improving electronic systems, and continuous development is expected in the future. However, significant obstacles to further reduction in feature size are being encountered. These obstacles include defect density control, optical system resolution limits, and availability of processing material and equipment. Attention has therefore increasingly shifted to semiconductor packaging as a means to fulfill the relentless demands for enhanced system performance.
Conventional single-chip packages typically have an area (or footprint) that is many times larger than the area of the chip, causing the printed circuit board to have excessively large area relative to the chips. However, as chip speeds increase, it becomes critical to position the chips close together since excessive signal transmission distance deteriorates signal integrity and propagation times. Other considerations such as manufacturing cost, reliability, heat transfer, moisture resistance, mounting and interconnect standardization, testability, and quality control have also become focal points of chip packaging.
Single-chip packages such as ball grid arrays (BGAs) have been developed to address these considerations. BGAs include a substrate with a top surface upon which the chip is mounted, an insulative housing that encapsulates the chip, and an array of solder balls that protrude from the bottom surface of the substrate. The solder balls are connected to the chip pads in one-to-one relation. Connection techniques widely used for connecting the chip pads to the BGA traces include wire bonding, tape automated bonding (TAB) and flip-chip bonding.
BGAs are tested before the next level assembly to assure a defect-free package.
Preferably, the chip has already been tested and is a known-good-die (KGD), and therefore the electrical test operation may contain fewer steps. However, electrical tests are performed to confirm proper electrical interconnection with the chip and the absence of opens, shorts, near-opens and near-shorts. Parametric testing using capacitance measurements can be used to supplement open/short testing to assure that the nets meet the required specifications for high-speed communication. Chip testing can also be used to supplement the open/short testing to assure that the chip has not been damaged during the package manufacturing. Burn-in testing is also common. The electrical testing provides important feedback to upstream processes and enhances the efficiency of downstream operations.
BGAs are tested using contact probes that contact the solder balls to provide temporary electrical signal paths between the BGA and an external tester. The solder balls are the most vulnerable elements of the package in terms of board-level reliability and place a premium on the contact test technology. The solder balls often are small and tightly spaced with a diameter of 0.5 mm or less and a pitch of 0.8 mm or less, are composed of 63Sn/37Pb eutectic that is susceptible to surface oxide, and have size variations that create coplanarity errors. Furthermore, the BGA substrate may exhibit warpage or thickness variations that compound the coplanarity errors.
Contact probes face significant challenges when used with BGAs. The contact probe should be small enough to fit within the geometric constraints yet have sufficient thickness and strength. The contact probe should also provide a contact force that is large enough to break through the surface oxide on the solder ball and provide a reliable connection, but not so great that it appreciably deforms or damages the solder ball. For instance, the contact probe might puncture the oxide and make a deep hole in a solder ball that leaves an air pocket in the solder joint after solder reflow during the next level assembly. The contact probe might also flatten the solder ball, and several semiconductor manufacturers require that no probe mark appear within a circular area 0.127 mm in diameter on the base of the solder ball. The contact probe should also deliver relatively uniform contact force over a wide range of solder ball displacements, thereby compensating for a reasonable amount of coplanarity error in the BGA.
Contact probes include the tweezer contact, side contact, Y contact, micro spring contact, spring and pin, probe and fuzzbutton, probe pin, conductive elastomer, metal contact in elastomer, etched pocket in silicon, conductive epoxy bump, plated metal bump on flex, metal-coated diamond/flex, and probe and conductive elastomer. The most common contact probes are spring-loaded pins and stamped metal contractors. Yet despite this extensive collection of contact probes, recent literature reports that at 0.5 mm pitch, many contact methods are being evaluated and the contacting problems are far from solved. See Crowley, “Socket Developments for CSP and FBGA Packages,” Chip Scale Review, May 1998, pp. 37-40.
Test sockets contain contact probes. Test sockets are often used for high volume, low cost manufacturing. In high volume manufacturing, it is especially beneficial to design only a few universal test sockets with minimal variations so that the cost of customized test sockets for various packages can be minimized. However, as BGAs trend towards fine pitch, such as 0.5 mm, universal test sockets no longer provide the desired electrode configuration. Providing expensive, customized test sockets to accommodate evolving BGA designs is not an entirely satisfactory solution. Furthermore, test sockets with fine pitch are difficult to manufacture with adequate mechanical precision and are considered specialty items.
Test probes can be installed in a test socket to provide an interposer (or adapter) that includes contact probes that make pressure contact with the BGA and leads that are plugged into the test socket. Test probes are relatively inexpensive and can be economically customized for BGAs with varying format and pitch. Test probes can be manufactured with fine dimensions and high precision to accommodate BGAs with fine pitch. In addition, test probes can contain a flexible elastomer and provide relatively uniform contact force over a wide range of solder ball displacements to accommodate BGAs with coplanarity errors. Thus, test probes provide significant advantages for BGA testing.
In view of the various development stages and limitations in currently available test sockets and contact probes, there is a need for a test probe that is cost-effective, reliable, manufacturable, and provides excellent mechanical and electrical performance, particularly for BGAs with a solder ball pitch of 0.5 mm or less.